In the brief span of less than two decades, fabrication techniques for "very large scale integration" (VLSI) chips have matured from a laboratory curiosity to routine manufacturing. As integrated circuit densities advance toward incredible numbers, chip production tools and methods strain to keep pace. To be useful, a VLSI chip must be precisely designed, thoroughly tested, and flawlessly manufactured. Producing a piece of silicon that is the size of a fingernail and contains millions of working transistors with millions of flawless interconnections is a daunting task. Doing so on the very first pass might seem impossible, but it is a realistic goal to which this invention is directed.
In today's competitive marketplace, companies must produce complex customized products quickly. The need to reduce time to market has increased the popularity of customized application specific integrated circuits (ASICs). Because it is an essential part of a new product, an ASIC chip must be developed quickly and designed right the first time, or the product may fail in the marketplace for lack of timeliness. What is needed is a fast path from initial design to a verified working ASIC chip. This invention can greatly shorten the design time for a new ASIC chip.
The complexity and miniature size of ASICs place unique demands on their development tools and processes. As a result, mechanical and printed circuit board (PCB) designers must work closely with ASIC designers to reduce the time to market. Although PCBs and ASICs may have a short useful lifespan, e.g., two years, ASICs often require two or more years to design, which is four to six times longer than most PCBs. Furthermore, large ASICs often exceed the memory and CPU capacity of PCB and other design tools. Simulating millions of gates of an ASIC logic design often exceed PCB simulation requirements. Finally, unlike PCB's, fabricated ASICs prototypes are not easily tested, measured, or altered.
To meet the demands imposed by ASIC designs, engineers need high-performance, large-capacity, accurate tools. Commonly called the "front-end process," the design creation, synthesis, and simulation enables the designer to develop a logical representation of their design. The "back-end process" of physical layout and verification assist designers with the physical representation of their designs. IC designers can choose from a variety of specific tools on the market for both categories.
It is axiomatic that a VLSI chip design must be verified, i.e., tested exhaustively against a reliable statement of its intended function, before it can be used. Without verification, the probability of combining hundreds of thousands of building blocks to obtain precisely the intended complex function is minuscule. Of course it is possible, given enough time and money, to cycle through the process of manufacturing prototypes of the chip and testing them in their intended environment until a working design is achieved. Chip foundry turnaround times have been reduced dramatically in recent years, however the cost, in both time and money, of manufacturing a prototype is still large and is likely to remain so.
Software simulation of a VLSI chip design is an alternative to prototyping. However, it is slow, tedious, and quite limited in capability. It is difficult, bordering on impossible, to check a VLSI chip design exhaustively by simulation due to the slowness of test execution and the difficulty and cost of generating and running a complete suite of test cases.
Increasing circuit densities of VLSI chips along with competitive pressures makes the prototyping and simulation approaches less desirable as the densities increase. Both approaches almost invariably require the iterative manufacturing of multiple prototype versions of a design to produce a fully functioning chip.
Emulators are much better choice for design verification than simulators, because an emulator can be used like a prototype and executes many times faster. An emulator uses the same input and output signals that would be used by a prototype, and may be substituted for a prototype in a real system. This is not possible with a simulator, where the input and output signals have to be synthesized and do not have the form of the real signals provided by an emulator or a prototype.